Year of certification: 2013
Flexible and Tolerant Reconfigurable memory with the Faults based on technologies 3D
Irisa - University of Rennes 1
The evolution recent in the field of technologies of integration silicon propose today the perpectives interesting ones by giving opportunities of piling up layers of silicon to constitute circuits known as 3D. Several techniques were developed to concervoir this kind of circuits, and even if currently certain problems are still unsolved, it is allowed that these technologies will be soon available. The multiprocessors on chip (MPSoC) are more and more often based on the integration of resources of reconfigurable calculation to support the flexibility of the application. This kind of material resource makes it possible to obtain performances and can be dynamically and partially reconfigured to carry out several tasks of the application. Nevertheless, the concept of reconfiguration is generally applied only to the operative part of a system. To address the problem of the organization memory in the context of MPSoC, the 3DFlexMem project proposes to exploit the concepts of the circuits 3D and the dynamic and partial recongifuration. By defining methods to ensure a suitable use of the innovating characteristics of these technologies, this project suggests new solutions for the organization memory of MPSoC 3D.
LEAT - Université Nice Sophia Antipolis
LIP6 - University Paris 6
TIMA - INP Grenoble
ECA LETI Grenoble